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AN900 Scheda tecnica(PDF) 13 Page - STMicroelectronics |
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AN900 Scheda tecnica(HTML) 13 Page - STMicroelectronics |
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13 / 15 page ![]() 13/15 INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY Wafer is diffused with N-type dopants to form the source and drain junction. The transistor gate material acts as a barrier to the dopant providing an undiffused channel self-aligned to the two junc- tions. The wafer is then oxidized to seal the junc- tions from contamination with a layer of SiO2. A thick glass layer is then deposited over the wafer (to provide better insulation), patterned with con- tact holes and placed in a high temperature fur- nace. Metal is deposited on the wafer and the in- terconnect patterns and external bonding pads are defined and etched. To prevent the device from contamination or moisture attack, wafers are sealed with a passivation layer. Patterning is done for the last time opening up windows only over the bond pads where external connections will be made. This completes basic fabrication sequence for a single poly and single metal layer process. |
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