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AN974 Scheda tecnica(PDF) 1 Page - STMicroelectronics

Il numero della parte AN974
Spiegazioni elettronici  Real time clock with ST7 Timer Output Compare
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN974 Scheda tecnica(HTML) 1 Page - STMicroelectronics

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AN974
APPLICATION NOTE
Real time clock with ST7 Timer Output Compare
By MCD Application Team
1 INTRODUCTION
The purpose of this note is to present how to use the ST7 Timer output compare function. As
an application example, this document presents how to generate a real time clock with
counters for seconds, minutes and hours, based on a fixed basic time base.
2 GENERATING A TIME BASE WITH ST7 TIMER
The ST7 timer output compare function can be used to generate the fixed time base.
2.1 TIMER CONFIGURATION AND INITIALIZATION
The application example is managed using the output compare interrupts. The ST7 timer has
two output compare functions whose interrupts are both enabled by the OCIE bit in the CR1
register. In this case, the Output Compare 1 (OC1) is used for time base generation while the
second one (OC2) is ignored when it generates an interrupt each time the free running counter
value matches the value in the OC2 register.
To minimize the CPU load, we need to choose the maximum time base value that has to be
multiplied to obtain one sec. For this reason the maximum timer clock divider ratio (1/8) is se-
lected by the CC1 and CC0 bits in the CR2 register.
2.2 OUTPUT COMPARE UPDATE
To maintain a fixed elapsed time between each Output Compare 1 interrupt generation, the
Output compare registers (OC1HR, OC1LR) have to be updated with a fixed offset time base
at each interrupt.
(OCxHR, OCxLR ) = (OCxHR, OCxLR) + (OCxHR OCxLR )offset
Caution: As the ST7 can only handles 8-bit data and as the output compare function is inhib-
ited between the write in the high (OCxHR) and the low (OCxLR) output compare registers,
special care has to be taken when the updating of the 16-bit compare register. A typical algo-
rithm flowchart is shown in Figure 1.
1


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