LTC2912 datasheet(6/14 Pages) LINER

6 / 14 page

LTC2912

2912fb

For more information www.linear.com/LTC2912

UV Output Voltage vs VCC

Reset Time-Out Period

vs Capacitance

UV, ISINK vs VCC

TYPICAL PERFORMANCE CHARACTERISTICS

UV/OV, Voltage Output Low

vs Output Sink Current

Reset Timeout Period

vs Temperature

OV/OV Output Voltage vs VCC

DIS (Pin 8/Pin 1, LTC2912-2): Output Disable Input.

Disables the OV and UV output pins. When DIS is pulled

high, the OV and UV pins are not asserted except during a

UVLO condition. Pin has a weak (2µA) internal pull‑down

to GND. Leave pin open if unused.

Exposed Pad (Pin 9, DDB Package): Exposed Pad may

be left open or connected to device ground.

GND (Pin 5/Pin 4): Device Ground.

LATCH (Pin 8/Pin 1, LTC2912-1, LTC2912-3): OV/OV

Latch Clear/Bypass Input. When pulled high, OV/OV latch

is cleared. While held high, OV/OV has a similar delay and

output characteristic as UV.

OV (Pin 6/Pin 3, LTC2912-1, LTC2912-2): Overvoltage

Logic Output. Asserts low when the VL input voltage is

above threshold. Latched low (LTC2912‑1). Held low for

programmed delay time after VL input is valid (LTC2912‑

2). Pin has a weak pull‑up to VCC and may be pulled above

VCC using an external pull‑up. Leave pin open if unused.

PIN FUNCTIONS (DFN/TSOT Packages)

SUPPLY VOLTAGE, VCC (V)

2912 G07

VH = 0.55V

SEL = VCC

TMR PIN CAPACITANCE, CTMR (nF)

100

1000

10000

0.1

100

1000

2912 G08

SUPPLY VOLTAGE, VCC (V)

2912 G09

VH = 0.45V

SEL = VCC

UV AT 150mV

UV AT 50mV

0.2

0.4

0.6

0.8

1.0

1912 G10

–40°C

25°C

85°C

IUV/OV (mA)

TEMPERATURE (°C)

–50

–25

2912 G11

100

CTMR = 1nF

SUPPLY VOLTAGE, VCC (V)

2912 G12

VL = 0.55V

LTC2912 Scheda tecnica(PDF) 6 Page - Linear Technology

LTC2912 Scheda tecnica(HTML) 6 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

Scheda tecnica Scarica

Link URL