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AN1827 Scheda tecnica(PDF) 6 Page - STMicroelectronics |
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AN1827 Scheda tecnica(HTML) 6 Page - STMicroelectronics |
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6 / 11 page ![]() 6/11 IMPLEMENTATION OF SIGMA-DELTA ADC WITH ST7FLITE05/09 3 THE DESCRIPTION OF THE SIGMA-DELTA CONVERSION PROGRAM The Sigma-Delta conversion procedure is executed cyclically in an interrupt from the AT timer with a period of 50µs. The result of the Sigma-Delta conversion (a 10-bit word) is achieved every 1024 interrupts, that is to say every 51.2ms. The main loop of the program awaits the Sigma-Delta conversion result and sends it through the RS serial interface to the computer. The start of the Sigma-Delta conversion is preceded with clearing of the loop conversion counter Loop_h, Loop_l and the result registry Adc_h, Adc_l. At the first stage, the service routine of the AT timer interrupt clears the marker of request and executes the A/D conversion from the AIN1 channel (the x8 amplifier is on). Following this, the result of conversion is compared with the constant value represented by the reference voltage 037h). If, in the result of comparison, the voltage from the AIN1 channel is lower than the reference voltage, then the B-Dlt port line will be set and the loop conversions counter will be increased. Loop_h, Loop_l. In a reverse situation, when the voltage from the AIN1 channel is higher than the reference voltage, the B-Dlt port line will be set to zero, and the Adc_h,Adc_l result registry as well as the Loop_h, Loop_l. loop conversion counter will be increased. The next task of the interrupt is to check whether the Loop_h, Loop_l loop conversion counter has reached the value 1024. When the Loop_h, Loop_l loop conversion counter is lower than 1024, the service routine of the interrupt finishes. If this condition is fulfilled the value of the re- sult registry is rewritten into the result Rez_h, Rez_l buffer and a request of a new result to the main loop is set and the start of a new conversion is initiated (clearing of the Loop_h, Loop_l counter and of the Adc_h,Adc_l.result registry) The period of an AT timer interrupt is not critical. In the below example, because of the fre- quency of the signal from the passive infrared detector and the speed of RS communication (19200bps), it has been defined at 50µs. ;********************************************************************** ;Listing of S-D conversion program. ;********************************************************************** st7/ TITLE "pir.asm" #INCLUDE "st72flt0.inc" ; definitions of registers st72lite ;********************************************************************** ;The program that realises the sigma/delta conversion ;sends the results of conversion to PC through the RS port ;********************************************************************** ;Definitions of variables |
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