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UPD6345GS Scheda tecnica(PDF) 7 Page - NEC |
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UPD6345GS Scheda tecnica(HTML) 7 Page - NEC |
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7 / 16 page ![]() 7 µPD6345 SWITCHING CHARACTERISTICS (Ta = 25 °C, VDD = 5 V, CL = 15 pF, R (On) = 300 Ω, VOUT = 12 V, tr = tf = 6 ns) ITEM SYMBOL CONDITION MIN. TYP. MAX. UNIT tPLH1 SCK → SO (High Level) 20 100 ns tPLH2 SCK → Driver Output (High Level) 20 1 µs tPHL1 SCK → SO (Low Level) 100 ns Propagation Delay Time tPHL2 SCK →Driver Output (Low Level) 1 µs tPHL3 RESET → SO 100 ns tPHL/PLH4 Output Enable → Driver Output 1 µs tPHL/PLH5 Latch Enable → Driver Output 1 µs Clock Transition Time tr SCK 70 µs tf Maximum Clock Frequency fmax 13 8 MHz Minimum Data Setup Time tSETUP 20 10 ns Minimum Data Hold Time tHOLD 20 10 ns Minimum Reset Pulse Width PWRESET 62.5 10 ns Minimum Output Enable Pulse Width PWENABLE 1 0.55 µs Minimum Latch Enable Pulse Width PWLATCH 62.5 38 ns Clock Pulse Width PWSCK 38 62.5 ns |
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