AN2633 datasheet(13/48 Pages) STMICROELECTRONICS

13 / 48 page

AN2633

Power supply and clocks

13/48

(1) The OFF and ON state can be configured in Idle mode gating register 0 (SCU_MGR0)

and the mode gating mask register 1 (SCU_MGR1)

Table 1.

Comparison of power control modes

Power State

Clocks

Wake-up event

Description

Normal Run mode

- All clocks are ON

- CPU is clocked by RCLK

(divided by RCLKDIV)

- Peripherals active if

enabled by the Peripheral

Clock Gating Registers

Special Interrupt

Run mode

- CPU is clocked by RCLK

- While executing interrupt

service routines, CPU is

clocked by fMSTR

(RCLKDIV is bypassed)

in Special Interrupt Run

mode FIQ.

- In Special Interrupt Run

mode using IRQ,CPU

operates at full speed,

when the IRQ service

routine reads the vector

address register in the

VIC.

- Peripherals active if

enabled by the Peripheral

Clock Gating Registers

Idle mode

-ARMCLK = OFF

-FMICLK = OFF

-HCLK = ON(1)

-PCLK = ON(1)

-External reset

-WDG reset

-Interrupts

-RTC Alarm

-External wake-up

- CPU off

- Peripherals active if

enabled by the Peripheral

Clock Gating Registers

AND the corresponding

bit is set in the Idle Mode

Gating Mask Registers

Sleep mode

-ARMCLK = OFF

-FMICLK = OFF

-HCLK = OFF

-PCLK = OFF

-External reset

-External wake-up

-RTC Alarm

- All clocks off except RTC

- Flash memory in power

down mode

- PLL off

- Oscillator pin (4-25 MHz)

off

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