AN2945

Peripherals

Doc ID 15468

7/18

whereas STM8S devices use a simpler, yet efficient, 8-bit bus standard. From the functional

point of view, they only differs by:

●

the register size: 8 vs. 16 or 32-bit

●

the maximum clock frequency that directly depends on the CPU operating speed

●

the DMA that offloads the CPU from simple data management and increases the

maximum data throughput

●

few product-specific functions, such as I/O port management

Let us consider the STM8S and STM32 SPI block diagrams shown in Figure 2. At first

glance, they look identical apart from a few differences in bits highlighted in red in Figure 2,

for instance, at the level of the DMA.

Figure 2.

SPI block diagrams

Now considering the register maps shown in Table 2 and Table 3, they are clearly based on

the same design: apart from a few differentiating bits and the register sizes, registers and

bits have similar names and locations in registers.

MOSI

MISO

Baud rate

generator

SCK

Master control logic

Communication

control

SPE BR2

BR1

BR0

MSTR CPOL CPHA

BR[2:0]

RXNE

LSB

BIDI

MODE

BIDI

OE

SSM

SSI

BSY

OVR

MOD

RXNE

TXE

ERR

TXE

00

DFF

0

SSOE

CRC

EN

0

RX

ONLY

CRC

Next

CRC

ERR

0

1

NSS

IE

F

FIRST

SPI_CR1

SPI_CR2

SPI_SR

TXDM

AEN

RXDM

AEN

IE

IE

Address and data bus

Read

Rx buffer

Shift register

LSB first

Tx buffer

Write

STM32

STM8

MOSI

MISO

Baud rate

generator

SCK

Master control

logic

Communication

control

SPE BR2

BR1

BR0

MSTR CPOL CPHA

BR[2:0]

RXNE

LSB

BIDI

MODE

BIDI

OE

SSM

SSI

BSY

OVR

MOD

RXNE

TXE

ERR

TXE

WKUP

0

0

0

0

CRC

EN

WKIE

RX

ONLY

CRC

Next

CRC

ERR

0

1

NSS

IE

F

FIRST

00

IE

IE

Address and data bus

Read

Rx buffer

Shift register

LSB first

Tx buffer

Write

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MASTER