RM0312 datasheet(115/275 Pages) STMICROELECTRONICS

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RM0312

16-bit general purpose timer (TIM2/TIM3)

170

17.4

TIMx clock/trigger controller

The clock/trigger controller allows you to configure the timer clock sources, input triggers

and output triggers. The block diagram is shown in Figure 30.

Figure 30. Clock/trigger controller block diagram

17.4.1

Prescaler clock (CK_PSC)

The Time base unit prescaler clock (CK_PSC) can be provided by the following clock

sources:

•

Internal clock (fMASTER)

•

External clock mode 1: external timer input (TIx)

•

External clock mode 2: external trigger input ETR

•

Internal trigger inputs (ITRx): using one timer as prescaler for another timer. Refer to

Using one timer as prescaler for another timer on page 123 for more details.

17.4.2

Internal clock source

If both the clock/trigger mode controller and the external trigger input are disabled

(SMS=0b000 in TIMx_SMCR and ECE=0 in the TIMx_ETR register), then the CEN, DIR

and UG bits are actual control bits and can be changed only by software (except UG which

remains cleared automatically). As soon as the CEN bit is written to 1, the prescaler is

clocked by the internal clock.

MS32911V1

ETR

fMASTER

Trigger

Controller

TI1FP1

TI2FP2

TRGI

controller

Encoder

interface

Reset, Enable,

Input filter

Polarity selection & edge

detector & prescaler

ETRP

TGI

ETRF

TIMx_TRIG

Mode

Clock/Trigger

TRGO

to other

timers

TRC

TI1F_ED

TRGO from TIM3 (ITR2)

TRGO from TIM2 (ITR3)

ITR

CK_PSC

to Time

Base Unit

From input stage

TRGO from TIM4 (ITR0)

Up/Down, Count

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