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LT1620IGN Scheda tecnica(PDF) 4 Page - Linear Technology

Il numero della parte LT1620IGN
Spiegazioni elettronici  Rail-to-Rail Current Sense Amplifier
PDF  12 Pages
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Produttore elettronici  LINER [Linear Technology]
Homepage  http://www.linear.com
Logo LINER - Linear Technology

LT1620IGN Scheda tecnica(HTML) 4 Page - Linear Technology

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LT1620/LT1621
PI FU CTIO S
input (across external sense resistor) equal to (VCC
VPROG)/10. Input voltage range is VCC to (VCC – 1.25V).
AVG2: Sense Amplifier AV = – 20 Output and Comparator
Positive Input. Used as integration node for end-of-cycle
determination flag. Integration time constant is calculated
using 5k
Ω typical output impedance.
PROG2: Comparator Negative Input. Program node for
end-of-cycle determination typically used during voltage
mode operation. The comparator threshold is reached
when the current sense amplifier differential input voltage
equals (VCC – VPROG2)/20. Input voltage range is (VCC
0.15V) to (VCC – 2.5V).
GND: Ground Reference.
MODE: Comparator Open Collector Output. Output is logic
low when magnitude of current sense amplifier differential
input voltage is less than (VCC – VPROG2)/20.
IOUT: Transconductance Amplifier Output. In typical appli-
cation, IOUT sinks current from current-setting node on
companion PWM controller IC, facilitating current mode
loop control.
FUNCTIONAL BLOCK DIAGRA
+
SENSE
AMPLIFIER
VCC
IN+
IN
PROG
PROG2*
500
2.5k
+
SENSE
AVG
AVG2*
IOUT
MODE*
LT1620/21 • FBD
gm
+
5k
*AVAILABLE IN THE LT1620GN ONLY
+
+
SENSE
SENSE
+
INTVCC
ITH
PWM
CONTROLLER
END-OF-CYCLE
(ACTIVE LOW)
(
×1 GAIN)
(
×10 GAIN)
(
×20 GAIN)
CURRENT
SENSE
RESISTOR
VID
GND
5V
OPERATION
Current Sense Amplifier
The current sense amplifier is a multiple output voltage
amplifier with an operational input common mode range
from 0V to 32V. The amplifier generates scaled output
voltages at the SENSE, AVG and AVG2 (available in
LT1620GN) pins. These output signal voltages are refer-
enced to the VCC supply by pulling signal current through
internal VCC referred resistors.
(Refer to the Functional Block Diagram)
The first output (SENSE) is a unity gain, level-shifted repre-
sentation of the input signal (IN+ – IN). In typical PWM/
charger type applications, this output is used to drive the
current sense amplifier of the mated PWM controller IC.
The other two outputs (AVG and AVG2) are internally
connected to a transconductance amplifier and compara-
tor, respectively. The AVG output yields a gain of 10, and
the AVG2 output provides a gain of 20. These pins are



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