LT1792CS8 datasheet(10/12 Pages) LINER

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LT1792

APPLICATI

I FOR ATIO

also increases the parasitic gate capacitance, which if left

unchecked, can result in increased overshoot and ring-

ing. When the feedback around the op amp is resistive

(RF), a pole will be created with RF, the source resistance

and capacitance (RS, CS), and the amplifier input capaci-

tance (CIN = 27pF). In low gain configurations and with

RS and RF in the kilohm range (Figure 5), this pole can

create excess phase shift and even oscillation. A small

capacitor (CF) in parallel with RF eliminates this problem.

With RS(CS + CIN) = RFCF, the effect of the feedback pole

is completely removed.

Figure 5

1792 F05

OUTPUT

CIN

1792 TA06

VOUT

TYPICAL OFFSET

≈ 0.8mV

1% TOLERANCES

FOR VIN = 10VP-P, VOUT = –121dB AT f > 330Hz

= – 6dB AT f = 16.3Hz

LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS

249k

100nF

33nF

237k

VIN

237k

249k

330nF

LT1792

10nF

154k

15V

–15V

LT1792

10Hz Fourth Order Chebyshev Lowpass Filter (0.01dB Ripple)

APPLICATI

TYPICAL

Accelerometer Amplifier with DC Servo

5V TO 15V

– 5V TO –15V

1792 TA03

OUTPUT

100M

1250pF

µF

18k

µF

20M

LT1792

20M

ACCELEROMETER

B & K MODEL 4381

OR EQUIVALENT

LT1792

R4C2 = R5C3 > R1 (1 + R2/R3) C1

OUTPUT = 0.8mV/pC* = 8.0mV/g**

DC OUTPUT

≤ 2.7mV

OUTPUT NOISE = 6nV/

√Hz AT 1kHz

*PICOCOULOMBS

**g = EARTH’S GRAVITATIONAL CONSTANT

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