3

LTC1426

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

CLK Low Level

SHDN

q

0.8

V

Input Voltage (Note 5)

CLK1, CLK2

q

0.8

V

SHDN

q

0.45

V

CLK1, CLK2

q

0.45

V

Three-State Output Leakage

SHDN = 0

q

±5

µA

CLK Input Resistance

Pushbutton Mode, CLK1/CLK2

2.5

M

Ω

Clock Frequency

q

1

MHz

q

750

kHz

Clock High Time

q

450

ns

q

600

ns

Clock Low Time

q

450

ns

q

600

ns

Pulse Width

Pushbutton Mode

q

670

µs

Debounce Time

Pushbutton Mode

q

10.7

12.8

21.3

ms

Repeat Rate Delay

Pushbutton Mode

q

340

410

680

ms

Repeat Frequency

Pushbutton Mode

q

11.7

19.5

23.4

Hz

using high quality, low ESR, low ESL 0.1

µF capacitors to eliminate PWM

switching noise that may otherwise get coupled into the CLK1/CLK2 high

impedance input buffers. The decoupling capacitors should be located in

close proximity to these pins and the ground line to have maximum effect.

Note 5: Input thresholds apply for both pushbutton and pulse modes.

temperature range.

Note 1: Absolute Maximum Ratings are those values beyond which the life

of the device may be impaired.

Note 2: All currents into device pins are positive; all currents out of device

pins are negative. All voltages are referenced to ground, unless otherwise

CODE

0

– 0.05

– 0.04

– 0.02

– 0.01

0

0.05

0.02

16

32

40

1426 G01

– 0.03

0.03

0.04

0.01

824

48

56

64

CODE

0

– 0.05

– 0.04

– 0.02

– 0.01

0

0.05

0.02

16

32

40

1426 G02

– 0.03

0.03

0.04

0.01

824

48

56

64

OUTPUT CURRENT SINK CAPABILITY (mA)

1

100

1000

0.1

10

100

1426 G03

0.1

1

10

85

°C

–40

°C

25

°C

Output Pull-Down Voltage

vs Output Current Sink Capability

Integral Nonlinearity (INL)

Differential Nonlinearity (DNL)