| Motore di ricerca datesheet componenti elettronici |
|
LTC1654IGN Scheda tecnica(PDF) 8 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LTC1654IGN Scheda tecnica(HTML) 8 Page - Linear Technology |
|
8 / 12 page ![]() 8 LTC1654 APPLICATIONS INFORMATION Rail-to-Rail Output Considerations In any rail-to-rail DAC, the output swing is limited to voltages within the supply range. If the DAC offset is negative, the output for the lowest codes limits at 0V as shown in Figure 2b. Similarly, limiting can occur near full scale when the REF pin is tied to VCC. If VREF = VCC and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC as shown in Figure 2c. No full-scale limiting can occur if VREF is less than (VCC – FSE). Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC 1654 F02 INPUT CODE (b) OUTPUT VOLTAGE NEGATIVE OFFSET 0V 8192 0 16383 INPUT CODE OUTPUT VOLTAGE (a) VREF = VCC VREF = VCC (c) INPUT CODE OUTPUT VOLTAGE POSITIVE FSE |
|
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |