7

LTC1694

0.95

(0.037)

REF

1.50 – 1.75

(0.059 – 0.069)

0.35 – 0.55

(0.014 – 0.022)

0.35 – 0.50

(0.014 – 0.020)

FIVE PLACES (NOTE 2)

S5 SOT-23 0599

2.80 – 3.00

(0.110 – 0.118)

(NOTE 3)

1.90

(0.074)

REF

0.90 – 1.45

(0.035 – 0.057)

0.90 – 1.30

(0.035 – 0.051)

0.00 – 0.15

(0.00 – 0.006)

0.09 – 0.20

(0.004 – 0.008)

(NOTE 2)

2.60 – 3.00

(0.102 – 0.118)

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DIMENSIONS ARE INCLUSIVE OF PLATING

3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

4. MOLD FLASH SHALL NOT EXCEED 0.254mm

5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)

Dimensions in inches (millimeters) unless otherwise noted.

S5 Package

5-Lead Plastic SOT-23

(LTC DWG # 05-08-1633)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

ACK Data Setup Time

The data setup time requirement for ACK (acknowledge)

edge is accomplished by the SMBus host releasing the

SDA line (pulling high) at the end of the last bit sent and the

SMBus slave device pulling the SDA line low before the

rising edge of the ACK clock pulse.

The LTC1694 2.2mA boosted pull-up current is activated

when the SMBus host releases the SDA line, allowing the

voltage to rise above the LTC1694’s comparator threshold

a longer time is required for this SMBus slave device to pull

SDA low before the rising edge of the ACK clock pulse.

To ensure sufficient data setup time for ACK, SMBus slave

earlier. Typically, a minimum setup time of 1.5

µsisneeded

capacitance of 200pF.

An alternative is that the SMBus slave device can hold SCL

line low until the SDA line reaches a stable state. Then, SCL

can be released to generate the ACK clock pulse.

APPLICATIO S I FOR ATIO

PACKAGE DESCRIPTIO