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RT9715CGF Scheda tecnica(PDF) 2 Page - Richtek Technology Corporation |
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RT9715CGF Scheda tecnica(HTML) 2 Page - Richtek Technology Corporation |
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2 / 12 page ![]() RT9715CA 2 DS9715CA-00 April 2015 www.richtek.com © Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Function Block Diagram Functional Pin Description Typical Application Circuit Note : A low-ESR 150 μμμμμF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to meet the 330mV maximum droop requirement in the hub VBUS. (see Application Information Section for further details) Supply Voltage 2.7V to 5.5V VIN VOUT GND RT9715CA Over -Current VBUS D+ D- GND USB Controller 1µF 150µF 10µF Pull-Up Resistor (10k to 100k) Ferrite Beads Data FLG EN CIN COUT Enable Gate Control Output Voltage Detection Delay Oscillator UVLO Charge Pump Bias Thermal Protection Current Limiting VOUT VIN GND EN FLG Pin No. Pin Name Pin Function 1 VOUT Output Voltage. 2 GND Ground. 3 FLG Fault FLAG Output. 4 EN Chip Enable (Active High). 5 VIN Power Input Voltage. |
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