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MGA-68563 Scheda tecnica(PDF) 2 Page - AVAGO TECHNOLOGIES LIMITED |
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MGA-68563 Scheda tecnica(HTML) 2 Page - AVAGO TECHNOLOGIES LIMITED |
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2 / 18 page ![]() 2 Wire Supplying Vbias from Agilent 4142 Direct to Ground Direct to Ground RF Input Blocking Cap Bias RF Output Reference Planes Bias Tee Vdd supply from Agilent 4142 Figure 1b. A diagram showing the connection to the DUT during an S and Noise parameter measurement using an automated tuner system. Note: Package marking provides orientation and identification: “6C” = Device Code “x” = Date code indicates the month of manufac- ture. OUTPUT and Vd GND GND GND INPUT 1 2 3 6 5 4 BIAS Feedback Id = Ids + Ibias Ibias Ids Vd Bias 1, 2, 5 4 3 Rbias Vbias Input match 6 RFin GND RFout Simplified Schematic Pin Connections and Package Marking Figure 1a. Test circuit of the 0.5 GHz production test board used for NF, Gain and OIP3 measurements. This circuit achieves a trade-off between optimal NF, Gain, OIP3 and input return loss. Circuit losses have been de-embedded from actual measurements. + 6.8 nH 100 pF 3 1 25 6 4 100 pF MGA-68563 47 nH 68 pF 10 nF 3V 4300 Ω MGA-68563 Absolute Maximum Ratings[1] Notes: 1. Operation of this device above any one of these parameters may cause permanent damage. 2. Bias is assumed at DC quiescent conditions. 3. With the DC (typical bias) and RF applied to the device at board temperature TB = 25°C. 4. Total dissipation power is referred to lead “5” temperature. Tc=92°C, derate Pdiss at 10.3mW/°C for Tc>92°C. 5. Thermal resistance measured using 150°C Liquid Crystal Measurement method. Symbol Parameter Units Absolute Maximum Vd Device Voltage (pin 6) [2] V6 Id Device Current (pin 6) [2] mA 100 Pin CW RF Input (pin3) (Vd=3V, Id=10mA) [3] (Vd=0V, Id=0mA) dBm dBm 21 21 Iref Bias Reference Current (pin 4) mA 1 Pdiss Total Power Dissipation [4] mW 600 TCH Channel Temperature °C 150 TSTG Storage Temperature °C 150 θch_b Thermal Resistance [5] °C/W 97 |
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