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9DMU0131 Scheda tecnica(PDF) 3 Page - Integrated Circuit Systems |
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9DMU0131 Scheda tecnica(HTML) 3 Page - Integrated Circuit Systems |
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3 / 10 page ![]() REVISION A 09/30/14 3 2:1 1.5V PCIE GEN1-2-3 CLOCK MUX 9DMU0131 DATASHEET Test Loads Driving LVDS Rs Low-Power HCSL Output Rs 5 inches Low-Power HCSL Output Test Load 2pF 2pF Zo=100ohms Alternate Differential Output Terminations Rs Zo Units 33 100 27 85 Ohms Driving LVDS inputs Receiver has termination Receiver does not have termination R7a, R7b 10K ohm 140 ohm R8a, R8b 5.6K ohm 75 ohm Cc 0.1 uF 0.1 uF Vcm 1.2 volts 1.2 volts Component Value Note LVDS CLK Input L4 R8b R7b R8a R7a 3.3 Volts Cc Cc Rs Rs Driving LVDS |
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