Digitally Controlled Analog I/O Processor

7

MX839 PRELIMINARY INFORMATION

© 1998 MX

xCOM Inc.

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Doc. # 20480164.002

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After enabling conversions the user must allow time for all enabled channels to be digitized before reading the results via

the ‘C-BUS’. The minimum required time to wait is:

A/D_CLK

CONV_MAX

f

Inputs'

Enabled

of

Number

'

)

2

+

10

(

=

T

[Seconds]

Upon disabling conversions the data for the most recent conversion completed for each channel will be available via the

‘C-BUS’ commands ‘READ A/D DATA x’ (addresses $DC, $DD, $DE, $DF) for input channels 1 through 4 respectively.

Do not forget to re-enable conversions by setting A/D control register bit 5, the READ bit, back high after reading the

desired A/D results. Note that the Magnitude Comparators (see section 4.4) can be configured to monitor the A/D channel

data in order to minimize the software burden of continuously reading the A/D channel data. It is not recommended to

issue ‘READ A/D DATA x’ commands without first setting A/D control register bit 5, the READ bit, low.

An Example C-BUS transaction to do a conversion and read of A/D Channel 1:

HEX

ADDRESS/

COMMAND

WRITE

DATA

BYTE 1

READ

DATA

BYTE 1

READ

DATA

BYTE 2

COMMENT

$01

N/A

N/A

N/A

Reset Device

$D0

$03

N/A

N/A

$D7

$70

N/A

N/A

Enable conversion on A/D Channel 1

$D7

$50

N/A

N/A

$DC

N/A

xxxxxxxx

000000xx

Read A/D Channel 1 Data

$D7

$70

N/A

N/A

Re-enable conversion on A/D Channel 1

4.4

Magnitude Comparators and Interrupt Request

High and low digital comparator reference levels are provided for the four digital magnitude comparators via the 'C-BUS'

interface. The digital input to the comparators is provided by the most significant 8 data bits of each A/D channel

When the sampled data falls outside the high or low digital comparator reference levels the status register is updated and

the IRQ pin is pulled low. When a reference level is set to '0', its IRQ is disabled.

4.5

Software Description

4.5.1

Address/Commands

Instructions and Data are transferred via the 'C-BUS' in accordance with the timing information provided in Figure 5.

Instruction and data transactions to and from the FX839 consist of an Address/Command byte followed by either:

(i) a control or DAC data write (1 or 2 bytes) or,

(ii) a status or A/D data read (1 or 2 bytes)