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SY604JC Scheda tecnica(PDF) 4 Page - Micrel Semiconductor |
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SY604JC Scheda tecnica(HTML) 4 Page - Micrel Semiconductor |
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4 / 8 page ![]() 4 SY604 Micrel AC CHARACTERISTICS The information in this table is guaranteed but not 100% production tested. See Figure 2 for a graphical representation. Maximum Tspan (ns) Minimum Trigger Maintaining Linearity Periods (ns) of ± 1 LSB ECL input values are -0.9 to -1.7V, with input rise/fall times ≤ 2ns, measured between the 20% and 80% points. Timing reference points at 50% for inputs and outputs. Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit fMAX Trigger Rate(1) —— 125 —— 125 —— 125 MHz tWI Trigger Width High 2.0 1.0 — 2.0 1.0 — 2.0 1.0 — ns tWO Output Pulse Width High Time 2.5 3.5 4.5 2.5 3.5 4.5 2.5 3.5 4.5 ns Output Pulse Rise/Fall Time (20/80%) — 550 750 — 550 750 — 550 750 ps tS Output Pulse Spacing Span = 4ns @ 1 LSB 8.0 —— 8.0 —— 8.0 —— ns Minimum Delay Time vs. Tspan ∆ T00 / ns (Tspan = 5 to 10ns) — 125 220 — 125 220 — 125 220 ps/ns Output Delay ns 1 LSB Tspan (Tspan = Tmax - Tmin) 4.0 — 40 4.0 — 40 4.0 — 40 ns 1 LSB Resolution (Tspan / 225) 15.7 — 157 15.7 — 157 15.7 — 157 ps Tempo (5ns Span) ∆ Tspan / ˚C — 2 —— 2 —— 2 — ps/˚C ∆ Tmin / ˚C — 2 —— 2 —— 2 — ps/˚C Power Supply Rejection — 60 —— 60 —— 60 — ps/V (Data = 0-FF HEX, Tspan = 5ns) tS CE Setup Time 2.0 —— 2.0 —— 2.0 —— ns tH CE Hold Time 1.5 —— 1.5 —— 1.5 —— ns tWH WRITE Pulse Width High Time 2.0 —— 2.0 —— 2.0 —— ns tDS D0 - D7 Setup Time 1.0 —— 1.0 —— 1.0 —— ns tDH D0 - D7 Hold Time 1.5 —— 1.5 —— 1.5 —— ns TA = +0˚C TA = +25˚C TA = +70˚C Maximum Tspan and Trigger Rates 4.0 8.0 5.1 10.0 5.8 11.1 6.75 12.5 8.1 14.3 9.9 16.6 12.0 20.0 15.5 25.0 22.0 33.3 OUT and OUT loading with 50 Ω to -2.0V. Typical values are based on nominal temperature, i.e., and nominal voltage, i.e., -5.2V. NOTE: 1. See chart below: |
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