M35500AFP datasheet(9/16 Pages) MITSUBISHI

Il numero della parte	M35500AFP

Spiegazioni elettronici	FLD(VFD) CONTROLLER

PDF	16 Pages

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Produttore elettronici	MITSUBISHI [Mitsubishi Electric Semiconductor]

Homepage	http://www.mitsubishichips.com

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MITSUBISHI <DIGITAL ASSP>

M35500AFP/BGP

FLD(VFD) CONTROLLER

RESET CIRCUIT

To reset the controller, the RESET pin should be held at a “L” level

for 2

µs or more. Then the RESET pin is returned to an “H” level (the

power source voltage should be between 4.0 V and 5.5 V, and XIN

oscillation is stable), reset is released.

Make sure that the reset input voltage is 0.5 V or less for 4.0 V of

VCC.

Fig. 10. Reset circuit example

(Note)

0.2VCC

Poweron

VCC

RESET

Note. Reset release voltage:VCC = 4.0 V

CLOCK GENERATING CIRCUIT

Oscillating circuit is built up by connecting pins XIN and XOUT as short

as possible and connecting a capacitor between pins XIN (XOUT) and

VSS.

When supplying a clock externally, input it to XIN pin and leave XOUT

pin open.

COSC

XIN

XOUT

XIN

XOUT

VCC

VSS

External oscillation

circuit

Open

Fig. 11. RC generating circuit

Fig. 12. External clock input circuit

HANDLING OF UNUSED PINS

Handle unused pins as the follow.

Segment

Digit

Analog input

Handling

Open

Connect to VCC or VSS through a resistor.

Table. 2. Handling of unused pins

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