16F628 datasheet(79/168 Pages) MICROCHIP

79 / 168 page

 2002 Microchip Technology Inc.

Preliminary

DS40044A-page 77

PIC16F627A/628A/648A

FIGURE 12-5:

USART TRANSMIT BLOCK DIAGRAM

Follow these steps when setting up an Asynchronous

Transmission:

TRISB<1> bit needs to be set and TRISB<2> bit

cleared in order to configure pins RB2/TX/CK

and RB1/RX/DT as the Universal Synchronous

Asynchronous Receiver Transmitter pins.

Initialize the SPBRG register for the appropriate

baud rate. If a high-speed baud rate is desired,

set bit BRGH. (Section 12.1)

Enable the asynchronous serial port by clearing

bit SYNC and setting bit SPEN.

If interrupts are desired, then set enable bit

TXIE.

If 9-bit transmission is desired, then set transmit

bit TX9.

Enable the transmission by setting bit TXEN,

which will also set bit TXIF.

If 9-bit transmission is selected, the ninth bit

should be loaded in bit TX9D.

Load data to the TXREG register (starts trans-

mission).

FIGURE 12-6:

ASYNCHRONOUS TRANSMISSION

TXIF

TXIE

Interrupt

TXEN

Baud Rate CLK

SPBRG

Baud Rate Generator

TX9D

MSb

LSb

Data Bus

TXREG register

TSR register

(8)

TX9

TRMT

SPEN

RB2/TX/CK pin

Pin Buffer

and Control

² ² ²

WORD 1

STOP Bit

WORD 1

Transmit Shift Reg

START Bit

Bit 0

Bit 1

Bit 7/8

Write to TXREG

Word 1

BRG output

(shift clock)

RB2/TX/CK (pin)

TXIF bit

(Transmit buffer

reg. empty flag)

TRMT bit

(Transmit shift

reg. empty flag)

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