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M35502AFP Scheda tecnica(PDF) 3 Page - Mitsubishi Electric Semiconductor |
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M35502AFP Scheda tecnica(HTML) 3 Page - Mitsubishi Electric Semiconductor |
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3 / 16 page ![]() 3 MITSUBISHI LINEAR IC’s M35502AFP FLD CONTROLLER Table 1 Pin description Function • Apply voltage of 5 V to VCC, and 0 V to VSS. • Applies voltage supplied to pull-down resistors. • Connect an external capacitor to this pin. • Serial transfer is possible by inputting “L” signal. • Pull-up resistor is built in. • Clock for serial transfer is input. • Read a clock twice with 2 MHz sampling clock and judge if it is a noise or not. • Serial data is input/output. • In input mode, read a clock twice with 2 MHz sampling clock and judge if it is a noise or not. • Pin for ordinary output or digit output. • At reset this por t is set to VEE level through a pull-down resistor. • Pin for digit output or segment output. • At reset this por t is set to VEE level through a pull-down resistor. Output N-channel open-drain P-channel open-drain P-channel open-drain Pin VCC, VSS VEE OSC ____ CS SCLK SDATA FLD24/P0 – FLD22/P2 FLD21– FLD0 Name Power source Pull-down power source Clock input Chip select Serial clock Serial input/ output Digit/Port Segment/Digit Input Input CMOS input CMOS input Noise filter CMOS input Noise filter PORT BLOCK Fig.3 Port block diagram PIN DESCRIPTION (2) Segmen/Digit pin VEE Segment/Digit data (1) Digit/Port pin Data bus Latch VEE Dimmer signal (Note) V Digit data V High-breakdown-voltage P-channel transistor Note: Dimmer signal is for setting the Toff time. A-D conversion input (6) A-D input (5) SCLK pin Serial clock input Noise filter Serial output (3) SDATA pin Serial input CS input (4) CS pin Noise filter Dimmer signal (Note) Latch V |
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