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HX318C9T2K2-8 Scheda tecnica(PDF) 1 Page - List of Unclassifed Manufacturers |
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HX318C9T2K2-8 Scheda tecnica(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 2 page ![]() HX318C9T2K2/8 8GB (4GB 512M x 64-Bit x 2 pcs.) DDR3-1866 CL9 240-Pin DIMM Kit DESCRIPTION HyperX HX318C9T2K2/8 is a kit of two 512M x 64-bit (4GB) DDR3-1866 CL9 SDRAM (Synchronous DRAM), 1Rx8 memory modules, based on eight 512M x 8-bit FBGA components per module. Each module kit supports (Extreme Intel XMP ® Memory Profiles). Total kit capacity is 8GB. Each module kit has been tested to run at DDR3-1866 at a low latency timing of 9-10-11 at 1.5V. The SPDs are programmed to JEDEC standard latency DDR3-1600 timing of 11-11-11 at 1.5V. Each 240-pin DIMM uses gold contact fingers. The JEDEC standard electrical and mechanical specifications are as follows: Document No. 4807092-001.B00 04/22/15 Page 1 SPECIFICATIONS 11 cycles ) D D I ( L C Row Cycle Time (tRCmin) 48.125ns (min.) Refresh to Active/Refresh 260ns (min.) Command Time (tRFCmin) Row Active Time (tRASmin) 35ns (min.) Maximum Operating Power TBD W* (per module) 0 - V 4 9 g n i t a R L U Operating Temperature 0o C to 85o C Storage Temperature -55o C to +100o C *Power will vary depending on the SDRAM used. FEATURES • JEDEC standard 1.5V (1.425V ~ 1.575V) Power Supply • VDDQ = 1.5V (1.425V ~ 1.575V) • 800MHz fCK for 1600Mb/sec/pin • 8 independent internal bank • Programmable CAS Latency: 11,10, 9, 8, 7, 6 • Programmable Additive Latency: 0, CL - 2, or CL - 1 clock • 8-bit pre-fetch • Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] • Bi-directional Differential Data Strobe • Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%) • On Die Termination using ODT pin • Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C • Asynchronous Reset • Height 2.118” (53.80mm) w/heatsink, single sided component Continued >> XMP TIMING PARAMETERS • JEDEC: DDR3-1600 CL11-11-11 @1.5V • XMP Profile #1: DDR3-1866 CL9-10-11 @1.5V • XMP Profile #2: DDR3-1600 CL9-9-9 @1.5V kingston.com/hyperx |
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