LX1670

PRODUCT DA T ABOOK 1996/1997

5

Copyright © 1997

Rev. 1.0

7/97

BLOCK DIAGRAM

VIDO

1

V

SENSE

2

P

GOOD

3

OV

OUT

4

ENABLE

5

BLKEN

6

GND

7

D0

8

D1

9

D2

10

D3

11

D4

12

D4B

13

V

CC

14

Output reference voltage used by PWM controller to set system voltage.

Connected directly to system output voltage.

Open collector output pulls low when the processor's supply is not good.

SCR Driver goes high when processor supply is over voltage.

TTL compatible chip enable. Internally pulled high.

Enables or disables blocking of codes with voltage blow 1.8V for CPU protection. Internally pulled high.

Analog ground return.

LSB DAC logic control. Internally pulled high.

2nd LSB DAC logic control. Internally pulled high.

3rd LSB DAC logic control. Internally pulled high.

MSB DAC logic control. Internally pulled high.

Scales VIDO output when low. Internally pulled high.

Inverting output of D4.

Analog power supply.

Pin Name

Pin #

Description

FUNCTIONAL PIN DESCRIPTION

FUNCTIONAL PIN DESCRIPTION

FUNCTIONAL PIN DESCRIPTION

FUNCTIONAL PIN DESCRIPTION

FUNCTIONAL PIN DESCRIPTION

4.67/4.47V

10.6/10.1V

14

6

5

V

CC

BLKEN

4

V

CC

0.87 * VS

0.935 * VS

0.93 * VE

3

2

ENABLE

OV

OUT

P

GOOD

V

SENSE

1

VIDO

VS

VE

2V REF

2X1

MUX

OUT

S

10

12

13

7

11

10

GND

D4B

D4

D3

D2

9

D1

8

D0

DAC

BLOCK

< 1.8V