ISO-CMOS

MT8979

4-181

† Characteristics are for clocked operation over the ranges of recommended operating temperature and supply voltage.

‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.

Figure 19 - Functional Timing for Receive Multiframe Clocks

Figure 20 - Functional Timing for Transmit Multiframe Clock

Figure 21 - Clock and Frame Timing for 2048 kbit/s ST-BUS Streams

Note 1: These two signals do not have a defined phase relationship.

Characteristics

Sym

Min

Max

Units

Test Conditions

1

Receive Multiframe Output Delay

t

RMFD

150

ns

50 pF

2

Transmit Multiframe Setup Time

50

ns

3

Transmit Multiframe Hold Time

50

*

ns

4

Tx Multiframe to C2 Setup Time

t

MF2S

100

ns

DSTo

Bit Cells

F0i

C2i

RxMF

Bit 7

Bit 6

Bit 5

Bit 4

Bit 0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 0

Bit 7

Frame 0

Frame 15

F0i

C2i

TxMF

DSTi

Bit Cells

Bit 7

Bit 6

Bit 5

Bit 4

Bit 0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 0

Bit 7

Frame 0

Frame N

F0i

C2i