LMT87LP datasheet(14/25 Pages) TI

14 / 25 page

LMT87, LMT87-Q1

SNIS170C – JAN 2014 – REVISED OCTOBER 2015

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Typical Applications (continued)

9.2.2.3 Application Curves

Time: 500

μsec/div; Top trace: VDD 1 V/div;

Time: 500

μsec/div; Top trace: VDD 1 V/div;

Bottom trace: OUT 1 V/div

Figure 15. Output Turn-on Response Time without a

Figure 16. Output Turn-on Response Time with a 1.1 nF

Capacitive Load and VDD=3.3V

Time: 500

μsec/div; Top trace: VDD 2 V/div;

Time: 500

μsec/div; Top trace: VDD 2 V/div;

Bottom trace: OUT 1 V/div

Figure 18. Output Turn-on Response Time with a 1.1 nF

Figure 17. Output Turn-on Response Time without a

Capacitive Load and VDD=5V

10 Power Supply Recommendations

The low supply current and supply range of 2.7 V to 5.5 V allow the device to easily be powered from many

sources.

Power supply bypassing is optional and is mainly dependent on the noise on the power supply used. In noisy

systems it may be necessary to add bypass capacitors to lower the noise that is coupled to the output of the

LMT87.

11 Layout

11.1 Layout Guidelines

The LMT87 is extremely simple to layout. If a power supply bypass capacitor is used, it should be connected as

shown in the Layout Example.

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LMT87LP Scheda tecnica(PDF) 14 Page - Texas Instruments