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GD25LQ40 Scheda tecnica(PDF) 8 Page - ELM Electronics

Il numero della parte GD25LQ40
Spiegazioni elettronici  1.8V Uniform Sector Dual and Quad Serial Flash
PDF  59 Pages
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Produttore elettronici  ELM [ELM Electronics]
Homepage  http://www.elmelectronics.com
Logo ELM - ELM Electronics

GD25LQ40 Scheda tecnica(HTML) 8 Page - ELM Electronics

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Rev.1.0
59 -
http://www.elm-tech.com
GD25LQ40xIGx 1.8V Uniform Sector Dual and Quad Serial Flash
Status Register Content
Memory Content
BP4 BP3 BP2 BP1 BP0
Blocks
Addresses
Density
Portion
×
×
0
0
0
NONE
NONE
NONE
NONE
0
0
0
0
1
7
070000H-07FFFFH
64KB
Upper 1/8
0
0
0
1
0
6 and 7
060000H-07FFFFH
128KB
Upper 1/4
0
0
0
1
1
4 to 7
040000H-07FFFFH
256KB
Upper 1/2
0
1
0
0
1
0
000000H-00FFFFH
64KB
Lower 1/8
0
1
0
1
0
0 and 1
000000H-01FFFFH
128KB
Lower 1/4
0
1
0
1
1
0 to 3
000000H-03FFFFH
256KB
Lower 1/2
0
×
1
×
×
0 to 7
000000H-07FFFFH
512KB
ALL
1
0
0
0
1
7
07F000H-07FFFFH
4KB
Upper 1/128
1
0
0
1
0
7
07E000H-07FFFFH
8KB
Upper 1/64
1
0
0
1
1
7
07C000H-07FFFFH
16KB
Upper 1/32
1
0
1
0
×
7
078000H-07FFFFH
32KB
Upper 1/16
1
0
1
1
0
7
078000H-07FFFFH
32KB
Upper 1/16
1
1
0
0
1
0
000000H-000FFFH
4KB
Lower 1/128
1
1
0
1
0
0
000000H-001FFFH
8KB
Lower 1/64
1
1
0
1
1
0
000000H-003FFFH
16KB
Lower 1/32
1
1
1
0
×
0
000000H-007FFFH
32KB
Lower 1/16
1
1
1
1
0
0
000000H-007FFFH
32KB
Lower 1/16
1
×
1
1
1
0 to 7
000000H-07FFFFH
512KB
ALL
Table 1. GD25LQ40 Protected area size (CMP=0)
5. DATA PROTECTION
The GD25LQ40 provides the following data protection methods:
♦ Write Enable (WREN) command: The WREN command is set the Write Enable Latch bit (WEL). The WEL
bit will return to reset by the following situation:
- Power-Up / Write Disable (WRDI) / Write Status Register (WRSR)
- Page Program (PP) / Sector Erase (SE) / Block Erase (BE) / Chip Erase (CE)
♦ Software Protection Mode: The Block Protect (BP4, BP3, BP2, BP1, BP0) bits define the section of the
memory array that can be read but not change.
♦ Hardware Protection Mode: WP# going low to protected the BP0~BP4 bits and SRP0~1 bits.
♦ Deep Power-Down Mode: In Deep Power-Down Mode, all commands are ignored except the Release from
Deep Power-Down Mode command.
Figure 1. Hold Condition
HOLD
HOLD
CS#
SCLK
HOLD#



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