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Z87010 Scheda tecnica(PDF) 4 Page - Zilog, Inc. |
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Z87010 Scheda tecnica(HTML) 4 Page - Zilog, Inc. |
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4 / 22 page ![]() Z87010/Z87L10 Audio Encoder/Decoders Zilog 2-4 P R E L I M I N A R Y DS96WRL0601 PIN DESCRIPTION (Continued) Table 1. 44-Pin PLCC Pin Identification No. Symbol Function Direction 1 HALT Stop execution Input 2 FS0 CODEC0 frame sync Input/Output* 3 /INT0 Interrupt Input 4-5 UO0-UO1 User output Output 6 FS1 CODEC1 frame sync Input/Output* 7,11,16,20,27 VSS Ground 8-10 EXT0-EXT2 External data bus Input/Output 12 RXD Serial input from CODECs Input 13-15 EXT12-EXT14 External data bus Input/Output 17 EXT15 External data bus Input/Output 18-19 EXT3-EXT4 External data bus Input/Output 21-23 EXT5-EXT7 External data bus Input/Output 24 TXD Serial output to CODECs Output 25-26 EXT8-EXT9 External data bus Input/Output 28-29 EXT10-EXT11 External data bus Input/Output 30 /INT2 Interrupt Input 31 /INT1 Interrupt Input 32 UI1 User input Input 33 UI0 User input Input 34 SCLK CODEC serial clock Input/Output* 35,42 VDD Power supply Input 36 RD//WR RD /WR strobe for EXT bus Output 37 WAIT WAIT state Input 38 /RESET Reset Input 39-41 EA0-EA2 External address bus Output 43 /DS Data strobe for external bus Output 44 CLK Clock Input Note: *Defined input or output by interface mode selection |
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