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LMP7704MT/NOPB Scheda tecnica(PDF) 31 Page - Texas Instruments |
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LMP7704MT/NOPB Scheda tecnica(HTML) 31 Page - Texas Instruments |
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31 / 44 page ![]() +3.3V +3 .3V GND +3.3V 1 +3.3V 2 +3.3V 1 V+ 2 V+ 3 V+ 2 GND 1 VOUT 2 GND 5 +3.3V +3.3V +3.3V VOUT 4 V– 1 GND GND 1 GND 2 VOUT 2 VOUT 1 V– 1 V– 2 V– GND G N D V+ LMP7701, LMP7702, LMP7704 www.ti.com SNOSAI9I – SEPTEMBER 2005 – REVISED NOVEMBER 2015 11 Layout 11.1 Layout Guidelines Take care to minimize the loop area formed by the bypass capacitor connection between supply pins and ground. A ground plane underneath the device is recommended; any bypass components to ground should have a nearby via to the ground plane. The optimum bypass capacitor placement is closest to the corresponding supply pin. Use of thicker traces from the bypass capacitors to the corresponding supply pins will lower the power supply inductance and provide a more stable power supply. The feedback components should be placed as close to the device as possible to minimize stray parasitics. 11.2 Layout Example Figure 53. LMP7701 Example Layout Copyright © 2005–2015, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Links: LMP7701 LMP7702 LMP7704 |
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