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54AC574F Scheda tecnica(PDF) 2 Page - National Semiconductor (TI) |
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54AC574F Scheda tecnica(HTML) 2 Page - National Semiconductor (TI) |
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2 / 10 page ![]() Connection Diagrams Functional Description The ’AC/’ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time require- ments on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. Function Table Inputs Internal Outputs Function OE CP D Q O N H H L NC Z Hold H H H NC Z Hold H N L L Z Load H N H H Z Load L N L L L Data Available L N H H H Data Available L H L NC NC No Change in Data L H H NC NC No Change in Data H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition NC = No Change Pin Assignment for DIP, and Flatpak DS100256-2 Pin Assignment for LCC DS100256-3 www.national.com 2 |
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