AP3595 datasheet(13/23 Pages) DIODES

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AP3595

Document number: DS36749 Rev. 1 - 2

13 of 23

www.diodes.com

January 2014

AP3595

A Product Line of

Diodes Incorporated

Application Information (Cont.)

9. Short Circuit Protection (SCP)

The AP3595 has over current protection (OCP) and output under voltage protection (UVP) functions.

9.1 OCP Function

The sensed current signals are monitored for over current protection. If ICSN is higher than 60A, the over current protection OCP is activated.

Take the above case for example, the OCP level is calculated as:

OCP

120











The OCP is of latch-off type and can be reset by toggling RT/EN or VCC POR.

9.2 UVP Function

The output feedback voltage VFB is also monitored for under voltage protection after soft start. The UV threshold is set as VFB-VSS<-0.3V. The

under voltage protection has 30

s triggered delay. When UVP is triggered, both high side and low side are shutdown immediately.

OCP and UVP are latched functions. The IC can power off, and then power on or use RT/EN reset to restart again.

10. Over Voltage Protection (OVP)

The output voltage VFB is continuously monitored for over voltage protection. When it is 300mV higher than setting, the OVP function is triggered.

The over voltage protection has 30

s triggered delay. When OVP is triggered, the LGATE will go high and the HGATE will go low to discharge the

output capacitor.

11. Droop Setting

In some high current applications, a requirement on precisely controlled output impedance is imposed. This dependence of output voltage on load

current is often termed droop regulation. The droop control block generates a voltage through external resistor RDRP (Which is between SS and

EAP) and then sets the droop voltage. The droop voltage, VDRP, is proportional to the total current in two channels (For more information about the

ICSN and IDRP, please refer to the current sense section). As shown in the following equation:

DRP







Where IDRP is the droop current which is mirrored from ICSN. The output voltage also can be described as:

CSN

DRP

OUT

DRP

DCR













12. Offset Current Setting

The AP3595 integrated IOFS allows the offset current to adjust phase current. The IOFS pin voltage is nominal 0.5V when connecting a resistor to

GND and 1.5V when connecting a resistor to VREF. Connecting a resistor from IOFS pin to GND generates a current source as:

OFS



This current is added to phase1 current signal ISEN1 for current balance. Consequently, phase2 will share more percentage of output current.

Connecting a resistor from IOFS pin to VREF pin generates a current source as:

OFS

)

(





This current is added to phase2 current signal ISEN2 for current balance. Consequently, phase1 will share more percentage of output current.

13. PWM Compensation

The output LC filter of a step down converter introduces a double pole, which contributes with -40dB/decade gain slope and 180 degrees phase

shift in the control loop. A compensation network among COMP, FB, and VOUT should be added. The compensation network is shown in Figure 9.

The output LC filters consist of the output inductors and output capacitors. For two-phase convertor, when assuming that VIN1=VIN2=VIN, L1=L2=L,

the transfer function of the LC filter is given by:

)

(













OUT

ESR

OUT

ESR

Gain

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