USB5533B datasheet(13/71 Pages) MICROCHIP

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DS00001680C-page 13

USB5533B

4.0

STANDARD INTERFACE CONNECTIONS

4.1

SPI Interface

The hub will interface to external memory depending on configuration of the USB5533B pins associated with each inter-

face type. The USB5533B will first check to see whether an external SPI Flash is present. If not, the USB5533B will

operate from internal ROM. If SPI Flash is present, the chip will operate from the external ROM.

The USB5533B is capable of code execution from an external SPI ROM. On power up, the firmware looks for an external

SPI flash device that contains a valid signature of 2DFU (device firmware upgrade) beginning at address 0xFFFA. If a

valid signature is found, then the external ROM is enabled and the code execution begins at address 0x0000 in the

external SPI device. If a valid signature is not found, then execution continues from internal ROM. The following sections

describe the interface options to the external SPI ROM.

4.1.1

OPERATION OF THE HI-SPEED READ SEQUENCE

The SPI controller will automatically handle code reads going out to the SPI ROM Address. When the controller detects

a read, the controller drops the SPI_CE, and puts out a 0x0B, followed by the 24-bit address. The SPI controller then

puts out a DUMMY byte. The next eight clocks clock in the first byte. When the first byte is clocked in a ready signal is

sent back to the processor, and the processor gets one byte.

After the processor gets the first byte, its address will change. If the address is one more than the last address, the SPI

controller will clock out one more byte. If the address in anything other than one more than the last address, the SPI

controller will terminate the transaction by taking SPI_CE high. As long as the addresses are sequential, the SPI Con-

troller will keep clocking in data.

FIGURE 4-1:

SPI HI-SPEED READ OPERATION

SPI

CONTROLLER

SPI

ROM

Serial to

Parllel

CE#

CLK

USB Hub

ADDRESS

CONTROL

CACHE

SPI_DI

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