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LAN8820I Scheda tecnica(PDF) 73 Page - Microchip Technology |
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LAN8820I Scheda tecnica(HTML) 73 Page - Microchip Technology |
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73 / 83 page ![]() 2009-2015 Microchip Technology Inc. DS00001871B-page 73 LAN8820/LAN8820I 5.5.6 SMI TIMING This section specifies the SMI timing of the device. Please refer to Section 3.4, "Serial Management Interface (SMI)," on page 20 for additional details. FIGURE 5-9: SMI TIMING TABLE 5-18: SMI TIMING VALUES Symbol Description Min Max Units Notes tclkp MDC period 400 ns tclkh MDC high time 160 (80%) ns tclkl MDC low time 160 (80%) ns tval MDIO (read from PHY) output valid from rising edge of MDC 300 ns tohold MDIO (read from PHY) output hold from rising edge of MDC 0ns tsu MDIO (write to PHY) setup time to rising edge of MDC 10 ns tihold MDIO (write to PHY) input hold time after rising edge of MDC 10 ns MDC MDIO tclkh tclkl tclkp tohold MDIO tsu tihold (Data-Out) (Data-In) tohold tval |
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