MEC1322 datasheet(84/456 Pages) MICROCHIP

84 / 456 page

MEC1322

DS00001719D-page 84

 2014 - 2015 Microchip Technology Inc.

MOV

AL, 08H

OUT DX,AL; Point to Logical Device 8

;

MOV

DX,CONFIG_PORT_BASE_ADDRESS

MOV

AL,60H

OUT

DX,AL

; Point to BASE ADDRESS REGISTER

MOV

DX,CONFIG_PORT_BASE_ADDRESS+1

MOV

AL,02H

OUT

DX,AL

; Update BASE ADDRESS REGISTER

;-----------------------------.

; DISABLE CONFIGURATION STATE

;-----------------------------'

MOV

DX,CONFIG_PORT_BASE_ADDRESS

MOV

AX,0AAH; Config Exit Key

OUT

DX,AL.

5.8.4

SERIAL IRQS

The device supports the serial interrupt scheme, which is adopted by several companies, to transmit interrupt informa-

tion to the system. The serial interrupt scheme adheres to the Serial IRQ Specification for PCI Systems Version 6.0..

5.8.4.1

Enabling SERIRQ Function

Each Serial IRQ channel defaults to disabled. To enable a Serial IRQ channel the host must program the Serial IRQ

Configuration Registers on page 89.

5.8.4.2

TIMING DIAGRAMS for SERIRQ CYCLE

LCLK = LCLK pin

SERIRQ = Serial IRQ pin

Start Frame timing with source sampled a low pulse on IRQ1

FIGURE 5-4:

SERIAL INTERRUPTS WAVEFORM “START FRAME”

Start Frame pulse can be 4-8 clocks wide.

Stop Frame Timing with Host using 17 SERIRQ sampling period

H=Host Control

SL=Slave Control

R=Recovery

T=Turn-around

S=Sample

SERIRQ

LCLK

Host Controller

IRQ1

Drive Source

None

IRQ0 FRAME

IRQ1 FRAME

IRQ2 FRAME

None

START

START FRAME

MEC1322 Scheda tecnica(PDF) 84 Page - Microchip Technology

MEC1322 Scheda tecnica(HTML) 84 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL