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DP83867CS Scheda tecnica(PDF) 83 Page - Texas Instruments |
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DP83867CS Scheda tecnica(HTML) 83 Page - Texas Instruments |
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83 / 114 page ![]() DP83867CS, DP83867IS, DP83867E www.ti.com SNLS504 – OCTOBER 2015 9.6.38 SGMII Control Register 1 (SGMIICTL1) Table 49. SGMII Control Register 1 (SGMIICTL1), Address 0x00D3 BIT BIT NAME DEFAULT DESCRIPTION 15 RESERVED 0, RO RESERVED: Writes ignored, read as 0. 14 SGMII_TYPE 0, RW SGMII Configuration: 1 = 6-wire mode. Enable differential SGMII clock to MAC. 0 = 4-wire mode 13:0 RESERVED 0, RO RESERVED: Writes ignored, read as 0. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 83 |
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