M24256-DRMF3TP datasheet(20/40 Pages) STMICROELECTRONICS

Il numero della parte	M24256-DRMF3TP

Spiegazioni elettronici	Automotive 256-Kbit serial I²C bus EEPROM with 1 MHz clock

PDF	40 Pages

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Produttore elettronici	STMICROELECTRONICS [STMicroelectronics]

Homepage	http://www.st.com

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20 / 40 page

Instructions

M24256-A125

20/40

DocID023506 Rev 4

4.2

Read operations

Read operations are performed independently of the state of the Write Control (WC) signal.

After the successful completion of a Read operation, the device internal address counter is

incremented by one, to point to the next byte address.

Figure 8. Read mode sequences

4.2.1

Random Address Read

The Random Address Read is a sequence composed of a truncated Write sequence (to

define a new address pointer value, see Table 3) followed by a current Read.

The Random Address Read sequence is therefore the sum of [Start + Device Select code

with RW=0 + two address bytes] (without Stop condition, as shown in Figure 8)] and [Start

condition + Device Select code with RW=1]. The memory device acknowledges the

sequence and then outputs the contents of the addressed byte. To terminate the data

transfer, the bus master does not acknowledge the last data byte and then issues a Stop

condition.

M24256-DRMF3TP Scheda tecnica(PDF) 20 Page - STMicroelectronics