Unit LoadingFan Out

54F74F

Pin Names

Description

UL

HIGHLOW

Address Inputs

1010

E

Enable Inputs (Active LOW)

1010

Outputs (Active LOW)

50333

b

1 mA20 mA

Functional Description

The ’F139 is a high-speed dual 1-of-4 decoderdemultiplex-

er The device has two independent decoders each of

Each decoder has an active LOW enable (E) When E is

HIGH all outputs are forced HIGH The enable can be used

as the data input for a 4-output demultiplexer application

Each half of the ’F139 generates all four minterms of two

variables These four minterms are useful in some applica-

tions replacing multiple gate functions as shown in

Figure 1

and thereby reducing the number of packages required in a

logic network

Truth Table

Inputs

Outputs

E

HX

X

H

H

H

H

LL

L

L

H

H

H

LH

L

H

L

H

H

LL

H

H

H

L

H

LH

H

H

H

H

L

TLF9479 – 6

FIGURE 1 Gate Functions

(each half)

Logic Diagram

TLF9479 – 5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays

2