Edition 1997-04-01

Published by Siemens AG,

Bereich Halbleiter, Marketing-

Kommunikation, Balanstraße 73,

81541 München

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C501 Data Sheet

Revision History :

1997-04-01

Previous Releases :

11.92, 11.93, 08.94, 08.95, 10.96

Page

(previous

version)

Page

(new

version)

Subjects (changes since last revision)

general

C501G-1E OTP version included

4

5

5-7

11

8, 9, 10

13

14

-

15-18

17

-

-

41

-

4

5

5-7

11

8, 9, 10

13

14

15

16-18

17

25-28

31

41

43, 44

Ordering information resorted and C501G-1E types added

Table with literature hints added

Pin configuration logic symbol for pins EA/Vpp and ALE/PROG updated

Pin description for ALE/PROG and EA/Vpp completed

Port 1, 3, 2 pin description: “bidirectional” replaced by “quasi-

bidirectional”

Block diagram updated for C501G-1E

New design of register (PSW) description

“Memory organization” added

Actualized design of the SFR tables

Reset value of T2CON corrected

Description for the C501-1E OTP version added

DC characteristics for C501-1E added

Timing “External Clock Drive” now behind “Data Memory Cycle”

AC characteristics for C501-1E added