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VS6663CB Scheda tecnica(PDF) 18 Page - STMicroelectronics |
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VS6663CB Scheda tecnica(HTML) 18 Page - STMicroelectronics |
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18 / 64 page  Functional description VS6663CB 18/64 Doc ID026749 Rev 2 3.2.2 Power-down procedure The power-down sequence timing constraints are shown in Table 7. Table 7. Power-down sequence timing constraints for CSI2 communications Symbol Parameter Minimum Maximum Units t8 Last I2C transaction to software standby - 1 frame t9 Last I2C transaction or MIPI frame end to XSHUTDOWN falling 512 - clock cycles t10 XSHUTDOWN to VANA/VDIG falling XSHUTDOWN must fall at the same time as, or earlier than, both power supplies (VDIG and VANA) t11 VANA to VDIG or VDIG to VANA falling VANA and VDIG may fall in any order, the rising separation can vary from 0 ns to indefinite |
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