Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

SC221 Scheda tecnica(PDF) 11 Page - Semtech Corporation

Il numero della parte SC221
Spiegazioni elettronici  Synchronous Step-Down Regulator
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC221 Scheda tecnica(HTML) 11 Page - Semtech Corporation

Back Button SC221 Datasheet HTML 6Page - Semtech Corporation SC221 Datasheet HTML 7Page - Semtech Corporation SC221 Datasheet HTML 8Page - Semtech Corporation SC221 Datasheet HTML 9Page - Semtech Corporation SC221 Datasheet HTML 10Page - Semtech Corporation SC221 Datasheet HTML 11Page - Semtech Corporation SC221 Datasheet HTML 12Page - Semtech Corporation SC221 Datasheet HTML 13Page - Semtech Corporation SC221 Datasheet HTML 14Page - Semtech Corporation  
Zoom Inzoom in Zoom Outzoom out
 11 / 14 page
background image
11
SC221 x
Applications Information (Cont.)
PCB Layout Considerations
Fundamental layout rules must be followed since the
layout is critical for achieving the desirable performance.
Poor layout can degrade the performance of the DC-DC
converter and can contribute to EMI problems, ground
bounce, and resistive voltage losses, and possibly poor
regulation and instability.
The following guidelines are recommended when devel-
oping a PCB layout:
1. The input capacitor, C
IN should be placed as close to
the PVIN and PGND pins as possible. This capacitor
provides a low impedance loop for the pulsed
currents present at the buck converter’s input. Use
short wide traces to connect this capacitor as close
to the IC as possible. This will minimize EMI and input
voltage ripple by localizing the high frequency current
pulses.
2. Keep the SW pin traces as short as possible to minimize
pickup of high frequency switching edges to other
parts of the circuit. C
OUT and L should be connected as
close as possible between the SW and GND pins, with
a direct return to the GND pin from C
OUT.
3. Route the output voltage feedback/sense path away
from the inductor and SW node to minimize noise
and magnetic interference to the output feedback/
sense path.
4. Use a ground plane referenced to the PGND pin,
and the ground connection of the input and output
capacitors should be put on this plane and close to
each other if possible, and as close to the PGND pin as
possible. Use several vias to connect to the component
side ground to further reduce noise and interference
on sensitive circuit nodes.
5. If possible, minimize the resistance from the VOUT
and AGND pin to the load. This will reduce the
voltage drop on the ground plane and improve the
load regulation. And it will also improve the overall
efficiency by reducing the copper losses on the output
and ground planes.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com