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UT54ACS169 Scheda tecnica(PDF) 7 Page - Aeroflex Circuit Technology |
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UT54ACS169 Scheda tecnica(HTML) 7 Page - Aeroflex Circuit Technology |
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7 / 11 page ![]() 7 AC ELECTRICAL CHARACTERISTICS 2 (VDD = 5.0V ±10%; VSS = 0V 1, -55 °C < T C < +125°C); Unless otherwise noted, Tc is per the temperature range ordered. Notes: 1. Maximum allowable relative shift equals 50mV. 2. All specifications valid for radiation dose ≤ 1E6 rads(Si). 3. Based on characterization, hold time (tH1) of 0ns can be assumed if data setup time (tSU1) is >10ns. This is guaranteed, but not tested. SYMBOL PARAMETER MINIMUM MAXIMUM UNIT tPLH CLK to RCO 2 23 ns tPHL CLK to RCO 4 28 ns tPLH CLK to any Q 4 24 ns tPHL CLK to any Q 4 24 ns tPLH ENT to RCO 1 15 ns tPHL ENT to RCO 2 16 ns tPLH U/D to RCO 2 16 ns tPHL U/D to RCO 2 16 ns fMAX Maximum clock frequency 71 MHz tSU1 A, B, C, D setup time before CLK ↑ 9 ns tSU2 LOAD , ENP, ENT, U/D Setup time before CLK ↑ 9 ns tH1 Data hold time after CLK ↑ 2 ns tH2 All synchronous inputs hold time after CLK ↑ 2 ns tW Minimum pulse width CLK high CLK low 7 ns |
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