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DF2B7SL Scheda tecnica(PDF) 5 Page - Toshiba Semiconductor |
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DF2B7SL Scheda tecnica(HTML) 5 Page - Toshiba Semiconductor |
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5 / 8 page ![]() DF2B7SL 5 8. 8. 8. 8. Clamp Voltage V Clamp Voltage V Clamp Voltage V Clamp Voltage VC C C C - Peak Pulse Current (I - Peak Pulse Current (I - Peak Pulse Current (I - Peak Pulse Current (IPP PP PP PP ) (Note) ) (Note) ) (Note) ) (Note) Fig. Fig. Fig. Fig. 8.1 8.1 8.1 8.1 V V V VC C C C - I - I - I - IPP PP PP PP Fig. Fig. Fig. Fig. 8.2 8.2 8.2 8.2 Based on IEC61000-4-5 8/20 Based on IEC61000-4-5 8/20 Based on IEC61000-4-5 8/20 Based on IEC61000-4-5 8/20 µ µ µ µs pulse. s pulse. s pulse. s pulse. (Ed.2) (Ed.2) (Ed.2) (Ed.2) Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 9. 9. 9. 9. Insertion Loss (S21) (Note) Insertion Loss (S21) (Note) Insertion Loss (S21) (Note) Insertion Loss (S21) (Note) Fig. Fig. Fig. Fig. 9.1 9.1 9.1 9.1 S21 - f S21 - f S21 - f S21 - f Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 2015-04-03 Rev.5.0 |
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