CGS74C2525 datasheet(2/10 Pages) NSC

Il numero della parte	CGS74C2525

Spiegazioni elettronici	1-to-8 Minimum Skew Clock Driver

PDF	10 Pages

Scroll/Zoom	100%

Produttore elettronici	NSC [National Semiconductor (TI)]

Homepage	http://www.national.com

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2 / 10 page

Functional Description

On the multiplexed clock device the SEL pin is used to

determine which CLKn input will have an active effect on

the outputs of the circuit When SEL e 1 the CLK1 input is

selected and when SEL e 0 the CLK0 input is selected

The non-selected CLKn input will not have any effect on the

logical output level of the circuit The output pins act as a

single entity and will follow the state of the CLK or

CLK1CLK0 pins when either the multiplexed (’2526) or the

straight (’2525) clock distribution chip is selected

Pin Description

Pin Names

Description

CLK

Clock Input (’2525)

CLK0 CLK1

Clock Inputs (’2526)

O0–O7

Outputs

SEL

Clock Select (’2526)

Truth Tables

’2525

Inputs

Outputs

CLK

O0–O7

’2526

Inputs

Outputs

CLK0

CLK1

SEL

O0–O7

L e Low Voltage Level

H e High Voltage Level

X e Immaterial

’2525

TLF10684 – 7

’2526

TLF10684 – 8

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