CLC005 datasheet(6/12 Pages) NSC

6 / 12 page

Operation (Continued)

OUTPUT AMPLITUDE ADJUSTMENT

The high and low output levels of the CLC005 are set by a

circuit shown simplified in

Figure 8. Output high and low lev-

els may be set independently with external resistor networks

connected between R

EXT-H (pin 3), REXT-L (pin 4) and the

power supplies. The resistor networks affect the high and

low output levels by changing the internally generated bias

voltages, V

H and V L. The nominal high and low output levels

are V

CC−1.7V and VCC−3.7V, respectively, when the pins

EXT-H and REXT-L are left unconnected. Though the internal

components which determine output voltage levels have ac-

curate ratios, their absolute values may be controlled only

within about ±15% of nominal. Even so, without external ad-

justment, output voltages are well controlled. A final design

should accommodate the variation in externally set output

voltages due to the CLC005’s part-to-part and external com-

ponent tolerances.

Output voltage swing may be reduced with the circuit shown

Figure 9. A single resistance chosen with the aid of the

graph,

Figure 10, is connected between pins 3 and 4. Output

voltage swing may be increased with the circuit of

Figure 11.

Figure 12 is used to estimate a value for resistor R. Note that

both of these circuits and the accompanying graphs assume

that the CLC005 is loaded with the standard 150

Ω. Be aware

that output loading will affect the output swing and the high

and low levels. It may be necessary to empirically select re-

sistances used to set output levels when the D.C. loading on

the CLC005 differs appreciably from 150

Ω.

DS100144-10

FIGURE 7. Differential Input DC Coupled Output

DS100144-11

FIGURE 8. Equivalent Bias Generation Circuit

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