CS9210 datasheet(23/39 Pages) NSC

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Revision 3.2

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Functional Description (Continued)

3.9.2

Addressing the Dithering Memories

As described in a previous section, the least significant

four bits of each color component intensity value are used

to select a 4x4 dithering pattern. In other words, there are

16 different 16-bit dithering patterns for each color compo-

nent (red, green, and blue). This requires one 256x1-bit

memory for each color component. The address to one of

these dithering pattern memories is then eight bits in

length.

The bit address for dithering memory is defined as the

concatenation of:

the least significant two bits of the display screen

horizontal position pixel count

the least significant two bits of the display screen

vertical position pixel count

the least significant four bits of the input intensity

value

This concatenation is as shown below:

Eight bits are written at a time across the CS9210 serial

interface into the dither memory. The bit at bit address off-

set 0 (dither memory bit Address[2:0] = 0) is the first bit of

the byte sent across the serial interface. The first bit is the

one marked "Data[7]" in Figure 3-4, which describes the

serial interface write protocol.

The red, green, and blue dither memories can be pro-

grammed individually, or all at once. Writing to all three

dither memories at the same time means that the dither-

ing patterns are the same for each of the three color com-

ponents

At any given time, only one of the three dither memories,

red, green, or blue, is mapped into the serial interface

address range as shown in Table 4-4, Index 80h. The

Control Register selects which dither memory, red, green,

or blue, is selected for read and writing.

The 8-bit address presented on the serial interface is

formed by adding the base address of the dither memory

address space from Index 80h to dither memory bit

Address[7:3].

Dithering Memory Bit Address[7:0]

= {X-Count[1:0], Y-Count[1:0], Intensity[3:0]}

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