DAC1006LCWM datasheet(15/22 Pages) NSC

15 / 22 page

621 Automatic Transfer

This makes use of a double byte (double precision) write

The first byte (8 bits) is strobed into the input latch and the

second byte causes a simultaneous strobe of the two re-

maining bits into the input latch and also the transfer of the

complete 10-bit word from the input latch to the DAC regis-

ter This is shown in the following timing diagram the point

in time where the analog output is updated is also indicated

on this diagram

DAC100610071008 (20-Pin Parts)

TLH5688 – 18

SIGNIFIES CONTROL INPUTS WHICH ARE DRIVEN IN PARALLEL

622 Transfer Using mP Write Stroke

The input latch is loaded with the first two write strobes The

XFER signal is provided by external logic as shown below

to cause the transfer to be accomplished on a third write

strobe This is shown in the following diagram

DAC100610071008 (20-Pin Parts)

TLH5688 – 19

623 Transfer Using an External Strobe

This is similar to the previous operation except the XFER

signal is not provided by the mP The timing diagram for this

DAC100610071008 (20-Pin Parts)

TLH5688 – 20

63 Interfacing to a 16-Bit Data Bus

The interface to a 16-bit data bus is easily handled by con-

necting to 10 of the available bus lines This allows a wiring

selected right justified or left justified data format This is

shown in the connection diagram of

Figure 17 where the

use of DB6 to DB15 gives left justified data operation Note

that any part number can be used and the Byte1Byte2 con-

trol should be wired Hi

DAC1006LCWM Scheda tecnica(PDF) 15 Page - National Semiconductor (TI)