DP83256 datasheet(81/144 Pages) NSC

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DP83256 Scheda tecnica(PDF) 81 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.

Il numero della parte	DP83256

Spiegazioni elettronici	PLAYERa??Device (FDDI Physical Layer Controller)

PDF	144 Pages

Scroll/Zoom	100%

Produttore elettronici	NSC [National Semiconductor (TI)]

Homepage	http://www.national.com

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81 / 144 page

50 Registers (Continued)

537 SCRUB TIMER VALUE REGISTER (STVR)

This is a snap-shot of the current value of the upper 8 bits of the scrub timer

During a Control Bus Interface write cycle the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register

(ICR) will be set to 1 and will ignore a write cycle

ACCESS RULES

ADDRESS

READ

WRITE

25h

Always

Write Reject

STV7

STV6

STV5

STV4

STV3

STV2

STV1

STV0

Bit

Symbol

Description

D0 – D7

STV0 – STV7

SCRUB TIMER VALUE BITk0-7l

Snap-shot of the scrub timer

STV0 is the Least Significant Bit (LSB)

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