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DP83266 Scheda tecnica(PDF) 41 Page - National Semiconductor (TI) |
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DP83266 Scheda tecnica(HTML) 41 Page - National Semiconductor (TI) |
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41 / 152 page ![]() 60 Functional Description (Service Engine) (Continued) TLF11705 – 15 FIGURE 6-10 Enhanced ABus Mode Burst Write Timing Single Write Tbr MACSI device asserts AB BR to indicate it wishes to perform a transfer Host asserts AB BG The MACSI de- vice moves to Tma in the next cycle Tma MACSI device drives AB A and AB AD with the master address asserts AB AS drives AB RW and AB SIZ 20 and negates AB BR until the end of this transaction Tpa The Physical address is asserted by the MMU Td MACSI device negates AB AS drives AB AD with the write data and starts sampling AB ACK AB ERR and AB DEN Slave captures AB AD data and acknowledges with AB ACK AB ERR and AB DEN Tw states may occur after Td if the slave does not acknowledge Tr MACSI device negates AB RW AB SIZ 20 releas- es AB A AB AD and AB AS and stops driving AB AD with data Slave deasserts AB ACK AB ERR and AB DEN 41 |
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