DP8344 datasheet(90/184 Pages) NSC

90 / 184 page

40 Remote Interface and Arbitration System (RIAS) (Continued)

TLF9336 – G7

(a) This timing diagram shows the second remote access violating rest time The first set of arrows shows the

BCP sampling a valid remote write The second set of arrows (1 T-state later) shows the BCP sampling the end of

the first remote access If a second remote access starts before the position of the third set of arrows (another

15 T-states later) the value of CMD will not be sampled The value of CMD has changed from the first remote

access so the BCP will write to the wrong location during the second access

TLF9336 – G8

(b) This timing diagram shows the second remote access violating rest time The first set of arrows shows the

BCP sampling a valid remote write The second set of arrows (1 T-state later) shows the BCP sampling the end of

the first remote access If a second remote access starts before the position of the third set of arrows (another

15 T-states later) the value of CMD will not be sampled The value of CMD does not change from the first remote

access so the BCP will write to the intended location during the second remote access

TLF9336 – G9

latched write The first set of arrows shows the BCP sampling the end of the first remote access

The second set of arrows (15 T-states later) shows the BCP recognizing no remote access has

started and the value of CMD will be sampled for the next remote access The third set of arrows

shows the BCP sampling the correct value of CMD for the second remote access

FIGURE 4-25 Remote Rest Time for All Modes except Latched Write

DP8344 Scheda tecnica(PDF) 90 Page - National Semiconductor (TI)