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74LVC2G38DP Scheda tecnica(PDF) 4 Page - NXP Semiconductors |
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74LVC2G38DP Scheda tecnica(HTML) 4 Page - NXP Semiconductors |
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4 / 15 page ![]() 2004 Oct 18 4 Philips Semiconductors Product specification Dual 2-input NAND gate (open drain) 74LVC2G38 38 1A VCC 1B 1Y 2Y 2B GND 2A 001aab829 1 2 3 4 6 5 8 7 Fig.1 Pin configuration TSSOP8 and VSSOP8. 38 2B 1Y VCC 2A 2Y 1B 1A GND 001aab830 36 27 18 45 Transparent top view Fig.2 Pin configuration XSON8. handbook, halfpage MNB129 1A 1B 1Y 2 1 7 2A 2B 2Y 6 5 3 Fig.3 Logic symbol. handbook, halfpage 2 7 & 1 6 3 & 5 MNB130 Fig.4 Logic symbol (IEEE/IEC). |
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