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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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DAC8564 Scheda tecnica(PDF) 35 Page - Texas Instruments |
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DAC8564 Scheda tecnica(HTML) 35 Page - Texas Instruments |
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35 / 51 page  DAC8564 www.ti.com SBAS403D – JUNE 2007 – REVISED MAY 2011 Example 5: Power-Down All Channels Simultaneously while Reference is Always Powered Up • 1st: Write sequence for enabling the DAC8564 internal reference all the time: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 0 0 0 0 1 0 0 0 1 X • 2nd: Write sequence to power-down all DACs to high-impedance: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 1 1 0 1 0 1 1 1 X X X The DAC A, DAC B, DAC C, and DAC D analog outputs sequentially power-down to high-impedance upon completion of the first and second write sequences, respectively. Example 6: Write a Specific Value to All DACs while Reference is Always Powered Down • 1st: Write sequence for disabling the DAC8564 internal reference all the time (after this sequence, the DAC8564 requires an external reference source to function): DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 0 0 0 0 1 0 0 1 0 X • 2nd: Write sequence to write specified data to all DACs: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 1 1 0 1 0 0 D15 D14 D13 D12 D11 –D0 The DAC A, DAC B, DAC C, and DAC D analog outputs simultaneously settle to the specified values upon completion of the fourth write sequence. (The DAC voltages update simultaneously after the 24th SCLK falling edge of the fourth write cycle). Reference is always powered-down. Example 7: Write a Specific Value to DAC A, while Reference is Placed in Default Mode and All Other DACs are Powered Down to High-Impedance • 1st: Write sequence for placing the DAC8564 internal reference into default mode. Alternately, this step can be replaced by performing a power-on reset (see the Power-On Reset section): DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 0 0 0 0 1 0 0 0 0 X • 2nd: Write sequence to power-down all DACs to high-impedance (after this sequence, the DAC8564 internal reference powers down automatically): DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 1 1 0 1 0 1 1 1 X X X • 3rd: Write sequence to power-up DAC A to a specified value (after this sequence, the DAC8564 internal reference powers up automatically): DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 –DB0 (A1) (A0) (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 1 0 0 0 0 D15 D14 D13 D12 D11 –D0 The DAC B, DAC C, and DAC D analog outputs simultaneously power-down to high-impedance, and DAC A settles to the specified value upon completion. Copyright © 2007–2011, Texas Instruments Incorporated 35 |
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